Aspects of the invention can relate to an improvement technology of a field-effect semiconductor device, such as a MOS transistor. Research and development of a technology of forming a thin film transistor having high current drive efficiency using a crystalline semiconductor film (e.g., polycrystalline silicon film) formed by a low-temperature process is in progress. In general, polycrystalline silicon films are formed by crystallizing amorphous silicon films by irradiating with laser thereto. However, the polycrystalline silicon films thus formed tend to have larger roughness in surfaces thereof because of protrusions formed of boundaries (grain boundaries) of crystal grains grown at various portions during the crystallization. In a thin film field-effect transistor (TFT) formed by depositing a gate insulation film and a gate electrode on the upper side of the polycrystalline silicon film, electric field is apt to be concentrated to the protrusions of the surface of the polycrystalline silicon film to cause dielectric breakdown of the gate insulation film. In view of such a problem, Japanese Patent Publication No. 2000-40828, for example, discloses a technology for preventing the dielectric breakdown of the gate insulation film in the thin film transistor by grinding to planarize the surface of the formed polycrystalline silicon film.
Incidentally, if the thickness of the gate insulation film is made thinner in order to enhance miniaturization of thin film transistors, the gate insulation film is apt to have a thinner part in the edge of the semiconductor film. In particular, when the gate insulation film is formed using a film deposition method having the low step-coverage capability, such as a sputtering process or a CVD process, the tendency of the above becomes marked. If the gate electrode is formed so as to traverse the edge portion, the electric field concentration occurs at that portion to cause the dielectric breakdown very often. Thus, inconvenience of degrading the reliability of the thin film transistor can occur. In the related art technology described above, it is difficult to achieve relaxation of such electric field concentration at the edge portion of the semiconductor film, and therefore, a further improved technology has been desired.